This invention relates to methods for manufacturing integrated circuits, and more particularly, methods for removing photoresist.
In integrated circuit manufacturing one of the requirements is to form vias between interconnect layers, which are typically metal. These interconnect layers are separated by an interlevel dielectric, also known as interlayer dielectric, or simply ILD. In forming the connection between the two interconnect layers, a via is formed in the interlayer dielectric prior to the formation of the upper interconnect layer. In the formation of the via, photoresist is used to provide a pattern for the vias. After the photoresist has been patterned, the via is etched through the interlevel dielectric to the underlying interconnect layer. An important aspect of this process is the subsequent removal of the photoresist. The photoresist must be removed before a subsequent formation of the upper interconnect layer on the interlevel dielectric and in the via. One of the problems in removing photoresist is that etch residue, commonly in a form called veils, or via veils, are typically formed on the sidewall at the bottom of the via and at the upper corners of the via. (The veils can also extend on the entire sidewall of the via.) These veils are a byproduct of the etchant materials that are used during the formation of the via and silicon and carbon from the etched interlevel dielectric and metal that is sputtered from the underlying metal interconnect layer at the bottom of the via.
These veils are typically removed by a wet clean using a liquid solvent. The photoresist is first removed using a dry strip followed by this solvent clean. The dry strip typically uses a microwave energy source for energizing the reactant species, a plasma which attacks the photoresist, which is a polymer, to strip the photoresist. The subsequent use of the solvent as the wet clean effectively removes the veils and any resist residue. After the solvent has been introduced, water is used to rinse off the solvent. The solvent is very effective but has a high consumable cost and potential problems with shrinking geometries. One potential problem is that there may be difficulties getting the solvent into the very small vias. Additionally, if the solvent is not removed completely by the water, it leaves a residue which can result in a high resistance via or unreliable electrical contact. Empirical data shows that this type of solvent-cleaned via must be filled with a metal in a timely manner, typically within twenty-four hours, to avoid excessive resistance in the contact.
One of the techniques that has been attempted to overcome the use of solvents is to use RF as an energizing source for the plasma. This has been shown to be effective in removing the veil, however, it also results in excessive charge build-up on the interconnect. The interconnect, at least in some places, will be connected to gate dielectrics. The consequent accumulation of charge on the interconnect will establish a voltage differential across the gate dielectric which may be excessive, resulting in the gate dielectric being damaged. The excessive charge build-up in the via which results in gate dielectrics being damaged is, of course, a big problem. Attempts to use RF energized NF3, O2, and N2H2 have resulted in problems with excessive charge build-up, inadequate uniformity across the wafer, and a requirement to fill the via within twenty-four hours after via formation.
Thus, there is a need for the ability to remove photoresist that does not use a liquid solvent and does not result in one or more of the problems associated with known chemical RF cleans.